Layout Release 9
Release Notes

November, 1998

Most of the information contained in these release notes is not included in the Layout manuals or online help. Please read the notes carefully to see if any apply to your designs.

Start by clicking Layout Release 9 notes or Advanced tool notes.

Layout Release 9 notes discusses enhancements and changes within the Layout program.

Advanced tool notes discusses SmartRoute issues, PCB 386+ issues, Visual CADD, GenCAD import, and GenCAM export.


 

Layout Release 9 notes

This section contains:


Installation notes

Installation notes gives you information concerning:

Previous versions

OrCAD recommends that you do not install Layout Release 9 into the same directory as any previous version of Layout.

Running Capture and Layout together

  • To pass property information between Capture and Layout, the CAPTURE.INI, LAYOUT.INI, PREFPROF.TXT and DSN2MNL.DLL netlisting program must all reside in the same directory (your OrCAD Capture directory). If you make changes to the LAYOUT.INI or PREFPROP.TXT files in the Layout directory, you should copy it into the Capture directory. Copying the LAYOUT.INI and PREFPROP.TXT files from the Layout directory into the Capture directory keeps the two LAYOUT.INI files and the two PREFPROP.TXT files in sync. That is important because it is those files in the Capture directory that DSN2MNL.DLL reads to pass property information.

  • If you have problems with netlisting after installation, please check OrCAD's Web site, www.orcad.com, for answers to frequently asked questions and the latest software updates.

Updating boards and libraries to version 9 format

Updating occurs automatically for any board or library loaded into Layout Release 9 or the library manager, and saved. If it is saved under a different name, only the new named file will be in Layout Release 9 format.

UPDATE90 migration utility

OrCAD provides the UPDATE90.exe utility for you to migrate entire directories from earlier versions of Layout to Layout Release 9. It is on the distribution CDROM and, if you are going to use it, must be copied to your Layout program directory. It uses the same DLLs and file access methods used by Layout, and provides the same results as loading an older file into Layout and saving it.

In addition, UPDATE90 has options that you can use to:

  • reorder your component pads into ascending numeric order.
  • reset the component origin to pad 1.
  • reset the insertion point for surface mount parts to the centroid of the part.
  • reset the insertion point for through-hole parts to either pad 1 or the centroid.
  • selectively control which components are updated.
  • list filenames and footprint names rather than perform update actions, and import the list into a spreadsheet, using a comma delimited format.
  • repair designs with the extraneous connection problem created by the original release of Layout Release 9 and Layout Release 9a.

Batch updating

If desired, you can update boards and libraries in a batch fashion using the UPDATE90 migration utility. This is strongly recommended for custom libraries so they will load more efficiently and not get further out of date with later releases. As a safety precaution it is always recommended to back up the pre-9 versions.

To update all the libraries in your directory:

  1. In the UPDATE90 dialog box, click the Browse button.
  2. Use the Browse dialog to make your library directory the current directory.
  3. Double-click one of the library filenames listed on the screen.
  4. After returning to the UPDATE90 dialog, change the "drive:\path\filename.llb" to just "drive:\path\*.llb" (changing the root filename to an asterisk).
  5. Click the Update button.

When UPDATE90 sees metacharacters in the input file specification (an asterisk or a question mark), it ignores the output file specification except for the ending suffix. When you click the "Update" button, all files that match your input specification are updated and written back to the source directory, using the suffix off the output file specification (usually "NEW") in place of the original "LLB" suffix.

Even though your updated libraries have a suffix other than "LLB", you can inspect the updated libraries using the Layout library manager. When you are satisfied with the success of the update operation, you can delete the old files (DEL *.LLB) and then rename the new files (REN *.NEW *.LLB" from a DOS shell prompt.


What's new

Many user-requested enhancements have been included in Layout Release 9. The following categories describe the most important of these.

 

New and improved graphical user interface

  • An all-new menu system that more closely follows the design process makes Layout easy to use. Whether you are a full-time board design specialist or an engineer who spends little time with PCB design tools, you can easily access the full power of Layout to quickly and efficiently get your job done.
  • A single menu (the Options menu) manages all settings that are vital to the design
  • Dialog boxes are redesigned to minimize the number of steps and menus needed to accomplish tasks.
  • Abundant shortcut keys and right mouse pop-up menus provide quick access to common tasks.

Manual routing improvements

  • You can now drag segments under DRC control to quickly position them where you want. Segments automatically change length as needed to maintain proper angles (90 degree, 135 degree).
  • You can now perform "T-routing", which allows you to route from or to any segment, via, or pad of the net that you are currently routing.
  • Dynamic Reconnect now displays a guideline to the nearest connection point when you are manually routing.

New and improved features in all Layout family members

  • Support for free vias. Free vias are user-defined vias that Layout will not optimize out of the design. You can use free vias to create single point grounds or to place decoupling capacitor vias exactly where you want them.
  • Free Via Matrix tool. You can use the Free Via Matrix tool to place multiple free vias into a user-specified area, at a user-specified x-y distance from each other, with a single command. The vias are inserted only where they will fit within DRC rules. They are typically used to stitch planes together.
  • You can also use the Free Via Matrix tool to place a row of vias around the periphery of a copper object, with a single command.
  • Fanout support for BGA and micro-BGA packages. You can fanout BGA packages, using the 45 degree 'dogbone' technology, and you can fanout micro-BGA packages with 'via in pad' technology, adding automatic thermal connections to planes.
  • New and improved translators.
  • New SPECCTRA bi-directional translator for access to Cadence SPECCTRA place and route tools.
  • New interface for PCB translators, to simplify legacy board translation.
  • Improved support for IDF 2.0, a bi-directional 3D modeling interface that supports mechanical ECO from mechanical design systems.
  • Improved support for GenCAD.
  • Support for the upcoming GenCAM (IPC-2510) CAD to CAM standard.
  • New GerbTool improvements include Gerber-to-DXF or DXF-to-Gerber translations.


Known problems

The following problems have been reported and are not yet fixed for this release of Layout. The list is intended to cite the most serious problems known. It is not an exhaustive list of all known problems.

Documentation errata

  • The first paragraph on Page 101 of the OrCAD Layout User's Guide, when referring to plane layers, should have the following information added:
  • "On a plane layer, Layout recognizes Z order with nested copper pours, but not with pours that partially overlap. Incomplete overlapping causes a disconnect-island between the overlapping pours."

    To see an illustration of the disconnect-island created by partially overlapping copper pours, see one of the following topics in the Layout online help:

    • Understanding Copper Pour.
    • Creating Copper Pour.
    • Creating Split Planes.

  • Page 46 of the OrCAD Layout User's Guide should read as follows for the To Create a New Padstack procedure:

    1. From the Tool menu, point to Padstack and select the Select from Spreadsheet command.
    2. From the Tool menu, point to Padstack and select New.
    3. Layout places a new padstack definition at the end of the spreadsheet. Scroll down to view it.

    4. From the Tool menu, point to Padstack and select Properties.

    5. Name the padstack and set the properties for each layer appropriately.

Application problems

Id Title
506 Pressing F5 or pressing home makes the Datum disappear.
707 AutoECO loads into all open copies of Layout.
825 Can't switch to manual routing tool once in curve route tool.
883 Moving free vias with pre-existing acute angles works erratically.
4158 Unused pin report is missing some pins.
4466 Change Width command from Tool, Net menu not working.
4630 IDF Translator has problem with footprint coordinates.
4665 Layout can't make padstack lib from imported CADSTAR file.
4683 Can't overwrite a padstack of the same name in the padstack lib.
4741 Swapping components changes their layer.
4778 SmartRoute has difficulty with components that have been rotated 45 degrees.
4780 Query does not work correctly when spaces or double periods are present.
4971 Datum disappears when using vertical scrollbar.
5040 Crash during Array placement of component with DRC on.
5144 Legacy boards that were Gerber X are Gerber D when first loaded.
5167 Lsession cannot open file with extended ASCII character in path.
5221 Highlight property set for a net causes highlighted pads to appear rotated 90 degrees.
5231 Zooming causes Dimension tool to drop out of drawing mode.
5260 Cannot import dimension objects from VCADD to Layout.
5261 Vertical text of vertical dimension lines is rotated 180 degrees when printed.


General notes

This section gives you information concerning:

 

Running multiple copies of Layout is not recommended

When multiple copies of Layout are running, data is shared between the two copies. Performing processes like AutoECO or making edits in the Library Manager can cause changes in other open copies.

Padstack library management

The way Layout handled padstack libraries had to be changed to accommodate an important feature request and also to fix a customer reported bug where he could not access PADSTACK.LLB if it resided outside the default Layout directories.

The feature request was to allow multiple padstack libraries to be accessed. The mechanism used is the PADSTACK_LIB section of LAYOUT.INI which was shipped with the entry:

PADSTACK=padstack.llb

This entry causes Layout to search for the file using its standard search mechanism.

Changing the padstack for a component pin will now read all padstack libraries and present the padstack entries in the list using the form:

PADSTACKNAME[LIB\PATH\NAME.EXT]

Selecting an entry will always load from the specified library (unlike older versions that loaded the first library found).

Choosing Save Padstack to Lib... from the Padstack Spreadsheet Popup Menu now pops up a dialog box. The dialog allows you to either select an existing padstack library, create a new one, or browse for an unlisted, but existing one. If a new library is added to the list by either Create or Browse, the PADSTACK_LIB section of LAYOUT.INI is automatically updated.

Elements that do not back annotate from Layout to Capture

The following elements do not back annotate to Capture. The recommended method for performing these types of changes is make the change in Capture and update Layout through the forward ECO process. If you choose to make the changes in Layout, be sure to manually update your schematic design.

  • changing a net. If you change net connectivity, only valid pin and gate swaps will be back annotated.
  • adding connections in Layout.
  • deleting connections in Layout.
  • adding a component to a design in Layout.
  • deleting a component in Layout.

LAYOUT.INI file

LAYOUT.INI is a file Layout uses to perform many of its tasks.

To locate the LAYOUT.INI file, Layout looks in the following locations:

  • the Windows Registry. This tells Layout where to find LAYOUT.INI.
  • EDA_ROOT\LIBRARY directory. Used for legacy schematic Capture systems.
  • EDA_ROOT\FP_LIB directory. Used for legacy schematic Capture systems.
  • current directory. Allows you to have a custom version with a design.
  • Layout directory (where LAYOUT.EXE resides). This can be on the network.

If LAYOUT.INI is not found, Layout uses the Windows search engine to search:

  • the Layout directory (where LAYOUT.EXE resides).
  • the current directory.
  • the SYSTEM directory (Windows 95).
  • the SYSTEM32, then the SYSTEM directory for Windows NT.
  • the Windows directory.
  • the Path environment.
  • the EDA_ROOT (a legacy environment variable).

Demo files directory

Demo files are found in the LAYOUT\SAMPLES subdirectories.

Sheet libraries

OrCAD no longer provides the older (sheet) libraries. OrCAD recommends that you do not use the older libraries.

Handling mirrored footprints with Capture v7.0 and Layout v7.1 and later

Layout v7.1x and later uses a user property called COMPSIDE to indicate which side of the board a component is on. By setting COMPSIDE=BOTTOM (or BOT), you can place a component on the bottom side of the board. COMPSIDE=TOP is the default.

Layout v6.42 did not have the COMPSIDE user property. It used a -M suffix to indicate a component that was mirrored to the bottom side of a board. Existing schematic/boards will work properly with the -M suffix, but for parts that have it, there will not be an actual footprint that exactly matches the name found in Capture and Layout.

To eliminate the -M property, search the user properties (in Capture) for footprints that contain a -M suffix. Remove the suffix and add the COMPSIDE user property, then forward ECO to Layout. You can also remove the -M attribute in Layout by using the footprint spreadsheet.

Attempting to run a security key locked version of Layout, without the security key

If you attempt to run a security key locked version of Layout without the lock, Layout searches the entire network for the security key. Searching the entire network can create a lengthy delay in reporting that Layout cannot find the lock.

Duplicate pin error

If you previously marked power pins as 'passive' to show visibility, it can cause Duplicate pin errors during AutoECO. This is because Capture now has visibility control for pins. You should remove all 'passive' markers on power pins and set the visibility to the same setting for all the power pins in a package.

If you experience this problem, please check OrCAD's Web site, www.orcad.com, for answers to frequently asked questions and the latest software updates.

Background remains black when selecting Preview

If the background remains black, instead of changing to white when you select Preview, select Redraw from the View menu.

Creating a Gerber file with the Create Apertures as Needed option enabled

When creating a GERBER-file (Gerber 274D with the Create Apertures as Needed option enabled), the created aperture file may contain a d-code with a smaller size than your Gerber photoplotter can use. Fractional mil apertures may even get rounded to 0.0000. You should always check the aperture file to verify that all apertures are usable, usually 2 mils or larger.

Converting pre- Layout v7.10 split planes to work with Layout v7.1x and later

Designs created with versions prior to v7.10 must be updated properly so the version 9 split plane functionality works properly.

IF YOUR PRE-v7.10 DESIGN IS NOT UPDATED PROPERLY, YOUR Layout Release 9 AND LATER DESIGNS WILL NOT HAVE CORRECT SPLIT PLANES!

In v7.10 or later, planes are split by drawing one or more Copper Pours over the regions you wish to dedicate to specific nets. You can assign only one net (the dominant net) to the plane itself. Other nets are assigned to the Copper Pours. After assigning nets, you can route and place vias for them over any region of the board. For through-hole vias, Layout v7.10 or later takes care to create thermal reliefs only within the appropriate regions. If you have "Use Pours For Connectivity" turned on in User Preferences, Layout v7.10 and later updates ratnests automatically.

Split planes in Layout versions prior to v7.10 were created differently, so boards with split planes being migrated to v7.10 and later require some small changes to the design.

When discussing the necessary changes, the following assumptions are made:

  • Split planes in versions prior to v7.10 have two nets assigned to the same plane layer (the split plane).
  • The plane is electronically broken into two pieces, either by Free Tracks, or Board Detail around the region dedicated to the second net.
  • Routes for the two nets are constrained so that through-vias for each net occur over regions belonging only to that net.

To convert a pre-v7.10 split plane to a v7.10 and later split plane:

  1. Unassign the second net from the plane layer.
  2. Convert the Free Track or Board Detail into a Copper Pour zone that encompasses the entire area of the second net.
  3. Activate "Use Pours for Connectivity" in the User Preferences Menu to eliminate the ratnest display of the two nets.


Advanced tool notes

This section contains notes concerning:


 

SmartRoute

The following topics concerning SmartRoute are discussed:

Layout features not supported in SmartRoute

  • translucent graphics mode
  • display (dot) grid
  • autopan
  • blind/buried vias
  • square vias
  • arcs in connections
  • testpoints. The Testpoint menu has been removed from SmartRoute. Testpoints should be added in Layout.

Routing weight behavior

SmartRoute does not support routing weight in the same manner as Layout. It behaves as follows:

  • It first selects all nets with a WEIGHT of 81-100 that have unrouted segments, then attempts to route them starting with the highest WEIGHT and the widest etch.
  • It then selects all nets with a WEIGHT of 61-100 (including routed Nets), and attempts to route them starting with the highest WEIGHT and the widest etch. During this pass, it also attempts to remove conflicts from the routed Nets.
  • It then continues in the same manner with weights from 0-60.

Fanout

Fanout is not as controllable in SmartRoute as it is in Layout. You cannot specify to go only to the interior or exterior of a component or specify whether to share fanout vias or not (SmartRoute is share only). Additionally, the new BGA fanout routines are available in Layout only. SmartRoute will easily route boards that have been fanned out in Layout. However, occasionally, SmartRoute will eliminate a fanout pad from a BGA and be unable to replace it if needed.

If you choose to fanout your board in Layout before routing with SmartRoute use a grid of 5 mils or less for the fanout.

Autorouting after component fanout

You should always lock fanout vias in your design before autorouting with SmartRoute. If you autoroute a design, and the components in the design have already been fanned out, SmartRoute might remove some fanout vias if they have not been locked.

Autorouter contentions

  • If SmartRoute finishes and there are still unrouted connections or there are contentions (left over spacing violations), try disabling fanout, memory, and pattern routing, then start the autorouter again. This may complete the board and remove any contentions.
  • If SmartRoute reports that it has contentions after it has completed routing, you should run a board space check in Layout.

Error code within first 10 minutes

If SmartRoute reports an error code forcing a restart within the first 10 minutes, the following message displays:

Routing problem encountered. Attempt auto-resume?

  • If you answer YES, the program attempts to restart and run, but if it restarts again immediately, it is in a loop and restarting cannot be performed.
  • If you answer NO, it stops running.
  • If it gets an error forcing a restart after 10 minutes it tries to restart automatically because these cases seldom loop.

Running more than one board in batch mode

To run more than one board in batch mode, use the Add to Batch and Start Batch commands on the File menu. Add to Batch allows you to specify the input and output filenames to route. Then Start Batch runs SmartRoute on each of the designs in sequence, producing a report of all the runs which is displayed when the program finishes the last design.

Density Display mode

  • Panning, zooming or redrawing while in density graph mode appears to change to the design view, but the display is still in Density Display mode, which is indicated by the lower right status bar display. You must press ESC to return to the design view.
  • The Layout density graph is optimized for placement. The SmartRoute density graph is optimized for routing.

Autorouting when notified there is no more memory

If the "Out of Memory" dialog box appears while you are routing a board, and routing is nearly completed, it may be possible to get it to finish by saving it, reloading, and starting again. To save time, turn off the fanout, memory, and pattern routing for the restart.

Estimated times

The estimated time for analyzing parameters and the To Go: value on the status bar are not very accurate. They are most useful for relative comparisons of component placements and routing rules.

Elapsed time

The Elapsed Time value shown in the status bar begins with the time already accumulated in Layout.

Highlighting nets

Highlighting a net is not persistent after a pan or zoom, and changing a highlight value for any net in SmartRoute causes highlight to be reset (off) for all other nets, even when returning to Layout.

Menus are active when autorouting

SmartRoute menus are active even when autorouting is in progress. The hourglass continues to display, but the menu options are active.

Pre-v7.10 designs

When loading pre-v7.10 designs to be routed with SmartRoute, you must first load them into Layout and then save them with a new name. That leaves you with both an older version for backup purposes and a current version of the design. Loading and saving updates the design database so that SmartRoute can work with a complete Layout Release 9 database.

Through-hole padstacks

To prevent SmartRoute from routing through a drill hole on a layer, all through-hole padstacks, including mounting holes, must have a pad definition on each layer. The pad definition may be smaller than the drill so there will be no chance of copper being around the drill hole. If a pad definition is not found, it is assumed that no drill exists in a given location. This is required so that blind and buried vias may be supported properly in the future.


PCB 386+ translation issues

This section contains information on the following topics:

Multiple-element pads

Layout does not support multiple-element (complex) padstacks. Only one of the defined elements is used as a pad, the others are converted to copper.

Connection point outside pad dimensions

Layout does not support pads whose connection point is outside the pad dimensions. This can happen when large pad offsets are used or when a pad rotation rotates the pad off the connection point, or both.

Invalid arcs

Invalid arcs are converted to straight-line segments. This happens when one of the end points of the arc is the same as the center of the arc.

Open connections

If after translation of a board from PCB 386+ to Layout, there are open connections shown for what should be routed nets, it can be because the board has duplicate wires on top of each other in the PCB 386+ file. This could happen on boards created with old versions and the routing was not changed in later versions.

To eliminate duplicate wires, load the board into PCB 386+, erase all routes, and undelete. Then do the translation again. If ratnest lines still exist on the translated board, run Mincon in Layout.

Wrong size thermals

Translated boards sometimes have thermals that are the wrong size. (Large thermal may get assigned when small thermal was wanted.) This will be fixed in the next release.


Visual CADD notes

Visual CADD places the following files in your Windows\System directory:

BIDS45.DLL

BOCOF.DLL

BWCC32.DLL

COMCTL32.OCX

COMDLG32.OCX

CTL3D32.DLL

CW3215.DLL

MFC40.DLL

MSVCRT40.DLL

OLEPRO32.DLL

TABCTL32.OCX

THREED32.OCX

VB40032.DLL

 

 

VEN2232.OLB

Some of these files may already exist on your computer. If you have problems running Visual CADD, it may be because of conflicting files from other applications. You will need to locate duplicates and remove older versions to a safe place where Windows does not find them.


GenCAD import

GenCAD files produced by the current version of VeriBest output solderside components with both the padstack and the footprint flipped. Pads that are supposed to be on the solder side of the board get flipped twice and appear on the top layer. If you are using the GenCAD format to import a board from Veribest into Layout, input the pads on solder side SMDs to determine if your version of Veribest contains this bug.


GenCAM export

Since Layout Release 9 shipped prior to the final changes and balloting on the IPC GenCAM standard, please download the updated translator from the OrCAD web site before using this translator to manufacture boards.