| Project Status (01/14/2011 - 16:45:03) | |||
| Project File: | system.xmp | Implementation State: | Programming File Generated |
| Module Name: | system |
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| Product Version: | EDK 12.3 |
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| XPS Reports | [-] | ||||
| Report Name | Generated | Errors | Warnings | Infos | |
| Platgen Log File | vie 14. ene 16:32:35 2011 | 0 | 20 Warnings (20 new) | 31 Infos (31 new) | |
| Libgen Log File | vie 14. ene 16:36:41 2011 | 0 | 0 | 0 | |
| Simgen Log File | |||||
| BitInit Log File | vie 14. ene 16:45:03 2011 | 0 | 0 | 16 Infos (16 new) | |
| System Log File | vie 14. ene 16:45:04 2011 | ||||
| XPS Synthesis Summary (estimated values) | [-] | |||||
| Report | Generated | Flip Flops Used | LUTs Used | BRAMS Used | Errors | |
| system | vie 14. ene 16:32:55 2011 | 2780 | 3899 | 18 | 0 | |
| fsl_v20_0_wrapper | vie 14. ene 16:32:12 2011 | 7 | 44 | 0 | ||
| timer_t_0_wrapper | vie 14. ene 16:32:06 2011 | 46 | 104 | 0 | ||
| xps_intc_0_wrapper | vie 14. ene 16:31:59 2011 | 120 | 84 | 0 | ||
| proc_sys_reset_0_wrapper | vie 14. ene 16:31:32 2011 | 69 | 53 | 0 | ||
| mdm_0_wrapper | vie 14. ene 16:31:25 2011 | 126 | 148 | 0 | ||
| clock_generator_0_wrapper | vie 14. ene 16:30:59 2011 | 4 | 0 | |||
| xps_timer_0_wrapper | vie 14. ene 16:30:53 2011 | 290 | 253 | 0 | ||
| flash_2mx16_wrapper | vie 14. ene 16:30:20 2011 | 598 | 656 | 0 | ||
| cs_push_3bit_wrapper | vie 14. ene 16:29:32 2011 | 90 | 55 | 0 | ||
| usb_uart_wrapper | vie 14. ene 16:29:04 2011 | 143 | 132 | 0 | ||
| lmb_bram_wrapper | vie 14. ene 16:28:35 2011 | 16 | 0 | |||
| ilmb_cntlr_wrapper | vie 14. ene 16:28:24 2011 | 2 | 6 | 0 | ||
| dlmb_cntlr_wrapper | vie 14. ene 16:28:20 2011 | 2 | 6 | 0 | ||
| dlmb_wrapper | vie 14. ene 16:28:16 2011 | 1 | 1 | 0 | ||
| ilmb_wrapper | vie 14. ene 16:28:12 2011 | 1 | 1 | 0 | ||
| mb_plb_wrapper | vie 14. ene 16:28:06 2011 | 154 | 435 | 0 | ||
| microblaze_0_wrapper | vie 14. ene 16:27:32 2011 | 1127 | 1921 | 2 | 0 | |
| Device Utilization Summary (actual values) | [-] | ||||
| Logic Utilization | Used | Available | Utilization | Note(s) | |
| Number of Slice Flip Flops | 2,128 | 7,168 | 29% | ||
| Number of 4 input LUTs | 3,255 | 7,168 | 45% | ||
| Number of occupied Slices | 2,396 | 3,584 | 66% | ||
| Number of Slices containing only related logic | 2,396 | 2,396 | 100% | ||
| Number of Slices containing unrelated logic | 0 | 2,396 | 0% | ||
| Total Number of 4 input LUTs | 3,302 | 7,168 | 46% | ||
| Number used as logic | 2,756 | ||||
| Number used as a route-thru | 47 | ||||
| Number used for Dual Port RAMs | 256 | ||||
| Number used as Shift registers | 243 | ||||
| Number of bonded IOBs | 53 | 195 | 27% | ||
| IOB Flip Flops | 74 | ||||
| Number of BUFGMUXs | 3 | 24 | 12% | ||
| Number of DCMs | 1 | 4 | 25% | ||
| Number of BSCANs | 1 | 1 | 100% | ||
| Number of BSCAN_SPARTAN3As | 1 | 1 | 100% | ||
| Number of MULT18X18SIOs | 3 | 20 | 15% | ||
| Number of RAMB16BWEs | 18 | 20 | 90% | ||
| Average Fanout of Non-Clock Nets | 3.64 | ||||
| Performance Summary | [-] | |||
| Final Timing Score: | 0 (Setup: 0, Hold: 0, Component Switching Limit: 0) | Pinout Data: | Pinout Report | |
| Routing Results: | All Signals Completely Routed | Clock Data: | Clock Report | |
| Timing Constraints: | All Constraints Met | |||
| Detailed Reports | [-] | |||||
| Report Name | Status | Generated | Errors | Warnings | Infos | |
| Translation Report | Current | vie 14. ene 16:33:19 2011 | 0 | 58 Warnings (58 new) | 1 Info (1 new) | |
| Map Report | Current | vie 14. ene 16:34:31 2011 | ||||
| Place and Route Report | Current | vie 14. ene 16:34:49 2011 | 0 | 2 Warnings (2 new) | 0 | |
| Post-PAR Static Timing Report | Current | vie 14. ene 16:34:57 2011 | 0 | 0 | 4 Infos (4 new) | |
| Bitgen Report | Current | vie 14. ene 16:35:19 2011 | 0 | 144 Warnings (144 new) | 1 Info (1 new) | |
| Secondary Reports | [-] | ||
| Report Name | Status | Generated | |
| WebTalk Log File | Current | vie 14. ene 16:35:21 2011 | |