Project Status (01/25/2011 - 12:14:18) | |||
Project File: | system.xmp | Implementation State: | Programming File Generated |
Module Name: | system |
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Product Version: | EDK 12.3 |
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XPS Reports | [-] | ||||
Report Name | Generated | Errors | Warnings | Infos | |
Platgen Log File | mar 25. ene 11:50:05 2011 | 0 | 18 Warnings (18 new) | 23 Infos (23 new) | |
Libgen Log File | mar 25. ene 12:13:00 2011 | 0 | 0 | 0 | |
Simgen Log File | |||||
BitInit Log File | mar 25. ene 12:14:19 2011 | 0 | 0 | 13 Infos (13 new) | |
System Log File | mar 25. ene 12:14:19 2011 |
XPS Synthesis Summary (estimated values) | [-] | |||||
Report | Generated | Flip Flops Used | LUTs Used | BRAMS Used | Errors | |
system | mar 25. ene 11:50:31 2011 | 2165 | 3150 | 16 | 0 | |
fsl_v20_0_wrapper | mar 25. ene 11:49:34 2011 | 7 | 44 | 0 | ||
generador_0_wrapper | mar 25. ene 11:49:23 2011 | 99 | 164 | 0 | ||
proc_sys_reset_0_wrapper | mar 25. ene 11:49:08 2011 | 69 | 53 | 0 | ||
mdm_0_wrapper | mar 25. ene 11:48:49 2011 | 126 | 148 | 0 | ||
clock_generator_0_wrapper | mar 25. ene 11:47:44 2011 | 4 | 0 | |||
flash_2mx16_wrapper | mar 25. ene 11:47:37 2011 | 472 | 382 | 0 | ||
cs_push_3bit_wrapper | mar 25. ene 11:45:58 2011 | 90 | 55 | 0 | ||
usb_uart_wrapper | mar 25. ene 11:44:11 2011 | 143 | 132 | 0 | ||
lmb_bram_wrapper | mar 25. ene 11:42:35 2011 | 16 | 0 | |||
ilmb_cntlr_wrapper | mar 25. ene 11:42:14 2011 | 2 | 6 | 0 | ||
dlmb_cntlr_wrapper | mar 25. ene 11:42:00 2011 | 2 | 6 | 0 | ||
dlmb_wrapper | mar 25. ene 11:41:51 2011 | 1 | 1 | 0 | ||
ilmb_wrapper | mar 25. ene 11:41:44 2011 | 1 | 1 | 0 | ||
mb_plb_wrapper | mar 25. ene 11:41:22 2011 | 155 | 382 | 0 | ||
microblaze_0_wrapper | mar 25. ene 11:39:22 2011 | 994 | 1776 | 0 |
Device Utilization Summary (actual values) | [-] | ||||
Logic Utilization | Used | Available | Utilization | Note(s) | |
Number of Slice Flip Flops | 1,605 | 7,168 | 22% | ||
Number of 4 input LUTs | 2,527 | 7,168 | 35% | ||
Number of occupied Slices | 1,829 | 3,584 | 51% | ||
Number of Slices containing only related logic | 1,829 | 1,829 | 100% | ||
Number of Slices containing unrelated logic | 0 | 1,829 | 0% | ||
Total Number of 4 input LUTs | 2,617 | 7,168 | 36% | ||
Number used as logic | 2,097 | ||||
Number used as a route-thru | 90 | ||||
Number used for Dual Port RAMs | 256 | ||||
Number used as Shift registers | 174 | ||||
Number of bonded IOBs | 57 | 195 | 29% | ||
IOB Flip Flops | 74 | ||||
Number of BUFGMUXs | 4 | 24 | 16% | ||
Number of DCMs | 1 | 4 | 25% | ||
Number of BSCANs | 1 | 1 | 100% | ||
Number of BSCAN_SPARTAN3As | 1 | 1 | 100% | ||
Number of MULT18X18SIOs | 3 | 20 | 15% | ||
Number of RAMB16BWEs | 16 | 20 | 80% | ||
Average Fanout of Non-Clock Nets | 3.66 |
Performance Summary | [-] | |||
Final Timing Score: | 0 (Setup: 0, Hold: 0, Component Switching Limit: 0) | Pinout Data: | Pinout Report | |
Routing Results: | All Signals Completely Routed | Clock Data: | Clock Report | |
Timing Constraints: | All Constraints Met |
Detailed Reports | [-] | |||||
Report Name | Status | Generated | Errors | Warnings | Infos | |
Translation Report | Current | mar 25. ene 11:51:05 2011 | 0 | 16 Warnings (16 new) | 1 Info (1 new) | |
Map Report | Current | mar 25. ene 11:52:15 2011 | ||||
Place and Route Report | Current | mar 25. ene 11:52:58 2011 | 0 | 3 Warnings (3 new) | 0 | |
Post-PAR Static Timing Report | Current | mar 25. ene 11:53:08 2011 | 0 | 0 | 4 Infos (4 new) | |
Bitgen Report | Current | mar 25. ene 11:53:27 2011 | 0 | 32 Warnings (32 new) | 1 Info (1 new) |
Secondary Reports | [-] | ||
Report Name | Status | Generated | |
WebTalk Log File | Current | mar 25. ene 11:53:29 2011 |